Platinized Silicon Wafers for Research and Production

university wafer substrates

Platinized Silicon Wafers

We can deposit by sputtering or evaporating Platinum group metels including Pt, Pd, Ir, Ru on Silicon wafers.

Below is a common spec that we sell. Other diameters and specs and quantity available.

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2 inch 50~200nm Platinized Si wafers (100)

2 inch 50~200nm Platinized Si wafers (111)

Type - p type
Dopant - B doped
Resistivity - 1-20 ohm cm
Thickness - 0.5 mm
Polish SSP or DSP


4" silicon wafers with a thin layer (~100-150 nm thin) of platinum on top


4” silicon wafers with coating:

TiO2 400A-450A + SiO2 5000A+/-200A+Pt 2000A


What are Platinized Silicon Wafers?

Today's commercial silicon wafers are capable of freeing silicon blocks with wires and saws - a process that is wasteful due to the high cost of producing each wafer, but Hyperion's new process solves this. " Technologies says its process reduces four separate production steps in a single, cost-effective, continuous process and significantly reduces silicon waste by forming individual waves directly from a molten silicon bath. The flaking process can be divided into two parts, each of which forms a crack on the edge of a pad and carries out a series of steps to check the integrity of each piece and the quality of its surface. [Sources: 0, 1]

In addition, the edge inclination of the silicon wafer with column structure is measured and the edges and steep slopes of each one are measured. In addition, a number of other parameters, such as the surface area, thickness and thickness of a silicon block, are measured quantities. [Sources: 0]

The results are shown in Figure 12, and the R and S readings are 1.5% and 2.3% of the total silicon wafer thickness, respectively. In addition, the surface of solar cells with bulk silicone wafers with column structure and flaking silicon wafers will be measured and a comparison of the properties of these devices will be shown. The measured values of e and e are 1: 45 and 1: 35, respectively; however, they are close to 1, which is closer to -1 if compared with the solar cell used in the bulk silicon wafer slit cell (Figure 11). The WAFERS brittle silicone solar cell is much more efficient than the standard cell used in conventional solar modules (Fig. 12). [Sources: 0]

The silicon wafers with column structure in Figure 6 have an even thickness of about 50 mm, but the deviation between silicon and wafer thickness remains below 2 mm (4). This means that the thickness of the flaking silicon layers is proportional to the nickel layer. With increasing thickness of the nickel layers, the tension caused by the nickel layer decreases, as the load is transferred from the nickel layer to silicon wafers. In addition, with increasing nickel thickness, the induced stress on the silicon wafer decreases, resulting in an increased thickness of the spalled silicon wafer (3). Stress, in contrast, decreases - induced nickel layers decrease as their thickness increases, and voltage transfer from nickel to silicon wafers. [Sources: 0]

Compared to the spectrum of pure silicon wafers, the concentrated silicon wafers show no obvious shift in the PL spectrum, indicating that the band structure in the spalled silicon wafer remains unchanged in relation to the PL (5). [Sources: 0]

This means that the thin silicon solar cells produced by laser treatment of silicon wafers with a high intensity laser (5) do not form cracks or defects in the strip structure. This confirms that the laser-treated silicon wafers are as thin as their pure counterparts after pretreatment. Consequently, it is confirmed that initial cracks caused by laser procedures lead to the formation of a thin strip - a structure without significant ligament defects (6). Although the silicon wafer has sufficient fracture stress, the fractures caused by laser treatment did not spread to other parts of the substrate. [Sources: 0]

After all, the solar cells produced from silicon wafers behaved in exactly the same way as their pure counterparts. Sak and J. HL produced solar cells from the silicon films of Wafers and measured their efficiency. [Sources: 0]

SIMS, which measures the efficiency of silicon wafers in terms of both the number of solar cells per square metre and the amount of silicon in each cell. [Sources: 0]

The thickness of the crevice-forming silicon wafer can be predicted if the initial cracks can calculate the stress caused by the electrodecentralizing layer. The results show that it is inversely proportional to stress, i.e. the induced load on the silicone wafer increases with decreasing internal load from the nickel layer and vice versa. In other words, if induced stresses on a silicon wafer are caused by external stresses (e.g. external pressure of a nickel stress layer), the thickness in the spalled silicon wafers is higher when internal stresses from nickel - the stressors in this layer are low - occur. If the stresses of nickel layers can be controlled as a function of the layer thickness, then we would expect to be able to predict the exact stress quantity - which induces nickel in each layer and its relative thickness. [Sources: 0]

In order to predict the thickness of the split silicon wafers, the new equation can be obtained using an electrodecentralized nickel layer. [Sources: 0]

Figure 10b shows the stress caused by the residual stress on the nickel layer and the thickness of the split silicon wafers. Figure 10a shows an electrodecentralized silicon layer with the same thickness as shown in Figure 10. [Sources: 0]

Figure 5a shows the flaking silicon wafers depending on the nickel thickness and the thickness of the electrodecentralized silicon layer of the same thickness. [Sources: 0]