Zinc Oxide on Silicon / Thermal Oxide Wafer
A Ph.D. student requested a quote for the following:
I would like to know if you could grow ZnO on Si / SiO2 substrates. The ZnO thicknesses would be 30, 40, 45, 50 and 60 nm, and I would like to know the prices as well. Thank you very much.
ubstrates will be Si (100), diameter 150mm, and Si thermal oxide around 300nm. It will be one wafer for each thickness of ZnO, which is 5 in total.
Reference #255493 for specs and pricing.
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What are Zinc Oxide on Silicon Substrate Applications?
Zinc oxide slapped onto silicon isn't just a fancy science thing—it's got this lineup of special traits that make it a heavy hitter in loads of different fields. ZnO's got some pretty cool uses, from powering up solar cells to lighting our screens and even sniffing out gases with its biosensors—it's a real multitasker on silicon.
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In the realm of optoelectronics, ZnO stands out; its broad band gap lends itself perfectly to crafting devices like vibrant LEDs and precise laser diodes. : ZnO stands out in the tech world, thanks to its hefty band gap—it's key for top-notch LEDs and laser diodes that need to shine bright in optoelectronic gear. ZnO shines in crafting UV light sources, thanks to its hefty band gap.
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Solar Cells : ZnO's knack for letting electrons zip through, paired with its ability to shrug off a lot of energy without breaking a sweat, really shines in thin-film solar cells.
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Sensors : ZnO is used in gas sensors and biosensors due to its sensitivity to changes in the electrical conductivity when exposed to different gases or biochemicals.
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Transistors : ZnO is employed in thin-film transistors (TFTs) for applications in liquid crystal displays (LCDs), OLED displays, and flexible electronics due to its good electronic properties and the ease of depositing it on silicon substrates.
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Piezoelectric Devices : ZnO exhibits piezoelectric properties, which are useful in microelectromechanical systems (MEMS), actuators, and acoustic wave devices.
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Photodetectors : Harnessing ZnO for its UV-sensing prowess opens doors to advanced flame detection and sharp environmental monitoring.
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ZnO's potential in spintronics—a cutting-edge field tapping into electron spin within solid-state devices—opens doors to revolutionizing how we store and process information. : Digging into how zinc oxide on silicon can play a big role in spintronics, scientists are getting excited about its knack for manipulating the way electrons twirl around in our tech.
ZnO, teamed up with the ever-present silicon bases in tech's core industry, turns into a real game-changer for all sorts of high-tech gear.
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Zinc Oxide on Silicon
The following wafers work
Thermal oxide Layer
Silicon Wafer Specifications:
- Conductive type: P-ype/ B-dped
- Resistivity: <0.001- 0.005 ohm.cm
- Size: 4" +/- 0.5 mm x 0.5 mm
- Orientation: (100) +/- 1o
- Polish: one side polished
- Surface roughness: < 5A
Researcher:
"I see that you have p-type silicon wafers that have 300nm of thermal oxide. I have a few questions about that. First I want to make sure that the thermal oxide is in fact SiO2. Is this correct? Also, does this type of wafer come in square shapes? I was hoping to print ZnO materials on this type of wafer in a square pattern. It would be much easier for me to work on a 10 mm by 10 mm wafer rather than a round one. Please let me know if you provide that.
Should we use Wet or Dry Oxide?"
UniversityWafer, Inc. Reply:
Definitely Dry Oxide. We have a process for gate dielectrics. It is used for other applications, but gate oxide is the primary purpose. It starts with Dry Chlorinated Oxide and adds a post-oxidation anneal in forming gas.
Dry oxide grows much slower than Wet oxide. This makes it much denser and a better dielectric. The addition of chlorine is to tie up mobile ions in the silicon crystal lattice, especially sodium. It ties them up chemically so that they cannot react with any part of the device or form a leakage pathway. The reason for the anneal in forming gas is to clean up hanging material at the oxide/silicon junction. There are always unfinished silicon chains at the interfaces that can provide a start for a pathway for current. This anneal effectively heals the silicon surface to reduce or eliminate them.
Every part of this process is designed to prevent the formation of a pathway that stray current can use to reach the device. This is ideal for gate oxides. If your client wants to reduce the cost we can do it without the anneal and it will still be a large improvement over wet thermal oxide.
One thing to note is that we cannot process square substrates. Very little semiconductor fabrication equipment can accommodate square substrates. I think your client will find this to be true of other foundries.
So we would have to use regular diameters and then dice.