Introduced in 1983, **150mm (5.9 inch, usually referred to as "6 inch")** are either undoped, boron doped, phosphorous doped, arsenic doped, antimony doped and can have low or high-doping. **Orientation can be (100), (111), (110).** 150mm wafers can use the CZ or FZ method for ingot growth. 150mm silicon can also be thinned to 25 micron if required. One or two flats are also available.

Let us know what specs we can quote for you!

This is impressive growth, supported by a slowly growing variety of applications such as the manufacture of "More Moore's Devices." As long as we continue with the class of equipment mentioned here, it is clear that the future of 150 mm wafer technology is bright.

Researchers from the Tata Institute of Fundamental Research in India are using our 150mm, mechanical grade, **SSP silicon wafers** in their work on Simple Microfluidic Devices. These devices are used for live cell imaging. The followng wafer was used for this research.

Si Item #478 - 150mm Mech Grade Si 650um SSP MECH

The following wafers wafers used by a major Solar OEM to test their wafer handling equipment.

Silicon Item: 857 - 150mm P /B <100> 0-10 620um SSP

150mm Silicon to Check the Surface Quality of Wafers in the Process of Production of Devices

Companies have used the following si wafer spec for production of test station to check the surface quality of wafers in the process of production of devices.

Item# 3465 - **150mm P-type Boron doped <100> 1-100 ohm-cm 625um SSP** Test Grade

Researchers have used the following 150mm silicon substrate that are perfectly round, without flats and fit into their DRIE tool.

Si Item #3269

150mm P/B <100> 1-20 ohm-cnm 1000um SSP Prime Grade

**A scientist asked:**

We are not looking for specific characteristics as thickness, diameter, doping, orientation, and so on. We just need to really know if the Test Grade is clean enough to work immediately as received, so that we can use the wafer surface to collect contamination and then analyze it. For this first trial we need just 25 wafers.

** UniversityWafer, Inc. Quoted and Sold the Following:**

Si Item #857

6", 675um, SSP, P/B<100>, 1-10 ohm-cm, Prime Grade

As the business continues to undergo a number of changes, chip manufacturers will need to keep an eye on the silicon wafer industry, according to a new report from Cree Inc., which estimates that chip manufacturers "demand for 150mm wafers will approach $2 million. First, Cree's estimate is approaching $1 million for a 150mm wafer by 2023, based on an impressive CAGR of 110% from 2017 to 2026 and an even higher growth rate in the second half of the decade. Overall, demand for silicone wafer surfaces is forecast to grow by 1.5% annually until reaching 2.2 million in 2020, a significant increase over the current annual growth rate. Global shipments of silicon wafers increased faster than in the same period in 2016 compared to the first quarter of 2017. [Sources: 7, 8]

This huge growth is being seen in a device industry that is in its infancy and is limited to a wafer size of 150mm, but there are a number of hurdles that the market needs to overcome to increase sales. [Sources: 1, 7]

In a 2012 interview published in Semiconductor Engineering, lithographer Chris Mack explained that a 450 mm wafer would only reduce the cost of the die of a 300 mm wafer by 10 to 20 percent. In 2012, he claimed that only 10 to 20% had reduced the cost of matrices compared to 300 mm wafers, which are lithography-related. [Sources: 3, 4]

The conversion to a larger 450 mm wafer would reduce the price of the die by 10 to 20 percent, although the costs here are related to the number of wafers and not to their area. The cost of a silicon silon wafer with a diameter of 150 mm (or even 300 mm) has increased in recent years due to its size. [Sources: 3]

A study by Transparency Market Research expects the global silicon wafer market to continue on a steady path of registering a CAGR of 6.8% over the forecast period of 2017 to 2025. Indeed, the company says demand could lag behind demand from next year and remain tight until 2021. Silicon wafer suppliers have said the average selling price will be about $1,500 per square foot for 150 mm, allowing investment in a 300 mm extension. [Sources: 1, 8]

This is impressive growth, supported by a slowly growing variety of applications such as the manufacture of "More Moore's Devices." As long as we continue with the class of equipment mentioned here, it is clear that the future of 150 mm wafer technology is bright. [Sources: 7]

If you need more background on the language of this article, it was originally published in the October / November 2014 issue of the International Journal of Solid State Circuits. [Sources: 4]

F Furnace - Grade Test Wafers are a type of silicon wafer that differs from an ordinary silicon wafer in that it is not strictly related to the SEMI - M1 - 0302 protocol, but has also had a significant influence on the development of the current state - the art of solid state circuits. [Sources: 0, 6]

However, it complies with the surface metal level normally specified by the IC industry and the requirements of the SEMI protocol - M1 - 0302, such as thickness, width and thickness. [Sources: 5]

The Czochralski process is a method of growing high-purity crystals from semiconductors such as silicon and germanium. The high resistance of silicon is produced with a crucible that is not used for crystal growth, and the silicon crystals contain 5x1022 atoms per cm3. Other elements known as doping agents are often added, melted and melted to molten silicon, but the degenerated semiconductor is still no more than 99.9999% silicon. In comparison, the resistance of the other two most common silicon materials, gallium and cobalt, is around 32% and 66% respectively. Under sterile conditions, silicon melts to about 1.5% of its original state, or about 0.1%. [Sources: 2, 4, 7]

The iPhone X uses the 150mm GaAs substrate to produce RFFE RF components with the VCSEL facial recognition photodetector. Gallium can also be used as a semiconductor material for use in high-performance electronics such as cameras. P-type wafers can be doped with boron, which is the same as the p-structure, where the epi-wafer layer is of a different type. [Sources: 2, 5, 7]

Mechanical grade silicon wafers can be used for process development applications that are not sensitive to particles and surface defects. Manufacturers of semiconductor capital equipment also use process tests of silicon wafers to develop and characterize semiconductor manufacturing processes. By using silicon test wafers as automation hardware, the system manufacturer simulates the process of production and end customers with the silicon wafer. [Sources: 6]

In terms of equipment, the silicon wafer market is divided into two categories: device and consumer level. This figure is the total size of the global silicon wafer market in volume and value. [Sources: 1, 7]

Prime wafers are the highest possible quality silicon wafers, but different Prime wafers are used. There are three additional classifications of premium wafers designed for special process applications. [Sources: 2, 6]

Sources:

[1]: https://www.transparencymarketresearch.com/silicon-wafers-market.html

[2]: https://cleanroom.byu.edu/ew_wafer_specs

[3]: https://en.wikipedia.org/wiki/Wafer_(electronics)

[5]: https://www.sciencedirect.com/topics/engineering/silicon-wafer

[7]: https://www.appliedmaterials.com/en-in/node/3361906

[8]: https://semiengineering.com/silicon-wafers-ma-and-price-hikes/

We have a large selection of 150mm **Si wafers** in stock and ready to ship. Please fill out the form if you need other specs and quantity. Below is just a small sample of what is in stock.

Item | Dia | Type | Dopant | Orien | Res Ω | Thick (um) | Polish | Grade | Description |
---|---|---|---|---|---|---|---|---|---|

478 | 150mm | N/A | 650um | SSP | MECH | Low cost Si Wafer great for spin coating. | |||

857 | 150mm | P | B | <100> | 0-10 | 620 um | SSP | Test | Test Grade Silicon great for wafer processing studies. |

1025 | 150mm | N | <100> | 0-100 | 625um | SSP | Test | 6" diameter (150mm), silicon wafers, N-type. | |

2880 | 150mm | P | B | <100> | 0.006-0.012 | 525um | SSP | Test | With Oxide Back Seal |

3071 | 150mm | P | B | <100> | 1-100 | 500um | SSP | Test | 2 SEMI-STD FLATS WHERE THE PRIMARY FLAT IS <110> |

3175 | 150mm | P | B | <111> | 0-0.003 | 525um | SSP | Test | No Certificate available, wafers sold "As-Is". |

Item |
Material |
Orient. |
Dia (mm) |
Thck(μm) |
Polish |
Res Ω | Comment |

1383 | Undoped | [100] | 6" | 650um | SSP | FZ >10,000 ohm-cm | |

2476 | N/P | [100] | 6" | 675um | SSP | FZ 2,000-10,000ohm-cm | Prime Grade, Float Zone (FZ) |

857 | P/B | [100] | 6" | 625um | P/E | 0-100 ohm-cm | Test Grade with flat |

478 | TYPE-ANY | ANY | 6" | 625um | P/E | Resistivity-ANY | Mech Grade with flat |

2312 | P/B | [100] | 6" | 675um | P/E | 0.01-0.02 ohm-cm | With EPI layer, Hard wetblast/LTO L.M. |

2305 | P/B | [100] | 6" | 725um | P/E | 14-22 ohm-cm | sd-soft laser mark |

2306 | P/B | [100] | 6" | 635-715um | P/E | 10-30 ohm-cm | 1 semi std. flat |

2307 | P/B | [100] | 6" | 650-700um | P/E | 10-30 ohm-cm | 2 semi std flats |

2308 | P/B | [100] | 6" | 610-640um | P/E | 0.008-0.02 ohm-cm | WITH EPI layer, poly bagged & labeled silicon wafers |

2309 | P/B | [100] | 6" | 650-690um | P/E | 100-200 ohm-cm | |

2310 | N/P | [100] | 6" | 625um | P/E | 56-72.5 ohm-cm | Poly-SI |

2311 | P/B | [100] | 6" | 675um | P/E | 15-25 ohm-cm | Poly-SI L.M. |

UW1972 | N/Phos | [100] | 6" | 320um | P/E | 2000-8000 ohm-cm | Prime Grade, Float Zone (FZ) |

E869 | P/B | [100] | 6" | 675 | P/P | FZ 10,000-20,000 | SEMI Prime, 1Flat (57.5mm), Empak cst |

5869 | P/B | [100] | 6" | 675 | P/P | FZ 5,000-20,000 | SEMI Prime, 1Flat (57.5mm), Empak cst |

6123 | P/B | [100] | 6" | 350 | P/P | FZ 2,700-3,250 | SEMI Prime, 1Flat (57.5mm), Empak cst |

G503 | P/B | [100] | 6" | 900 | C/C | FZ >50 | SEMI Prime, 1Flat, MCC Lifetime>6,000μs, Empak cst |

E239 | n-type Si:P | [100] | 6" | 825 | C/C | FZ 7,000-8,000 {7,025-7,856} | SEMI, 1Flat, Lifetime=7,562μs, in Open Empak cst |

E700 | n-type Si:P | [100-6° towards[111]] ±0.5° | 6" | 675 | P/P | FZ >3,500 | SEMI Prime, 1Flat (57.5mm), Empak cst |

F700 | n-type Si:P | [100-6° towards[111]] ±0.5° | 6" | 790 ±10 | C/C | FZ >3,500 | SEMI, 1Flat, Empak cst |

4982 | n-type Si:P | [100-6° towards[111]] ±0.5° | 6" | 675 | P/P | FZ >1,000 | SEMI Prime, Notch on <010> {not on <011>}, Laser Mark, Empak cst |

D982 | n-type Si:P | [100-6° towards[111]] ±0.5° | 6" | 675 | BROKEN | FZ >1,000 | SEMI notch Test, Empak cst, Broken into many large pieces. One piece ~50% of wafers other pieces ~20% of wafer |

5325 | n-type Si:P | [100] | 6" | 725 | P/P | FZ 50-70 {57-62} | SEMI Prime, 1Flat (57.5mm), Lifetime=15,799μs, Empak cst |

E325 | n-type Si:P | [100] | 6" | 725 | P/P | FZ 50-70 | SEMI Prime, 1Flat (57.5mm), Empak cst |

N445 | n-type Si:P | [112-5.0° towards[11-1]] ±0.5° | 6" | 875 ±10 | E/E | FZ >3,000 | SEMI, 1Flat (47.5mm), TTV<4μm, Surface Chips |

G343 | n-type Si:P | [112-5° towards[11-1]] ±0.5° | 6" | 1,000 ±10 | C/C | FZ >3,000 | SEMI, 1 JEIDA Flat (47.5mm), Empak cst, TTV<4μm, Lifetime>1,000μs |

5822 | Intrinsic Si:- | [100] | 6" | 575 | P/P | FZ >10,000 | SEMI Prime, 1Flat (57.5mm), MCC Lifetime>1,200µs, Empak cst |

6178 | Intrinsic Si:- | [100] | 6" | 675 | P/P | FZ >10,000 | SEMI notch Prime, Empak cst |

E179 | Intrinsic Si:- | [111] ±0.5° | 6" | 750 | E/E | FZ >10,000 | SEMI notch, TEST (defects, cannot be polished out), Empak cst |

G458 | P/B | [110] ±0.5° | 6" | 390 ±10 | C/C | >10 | Prime, 2Flats, Empak cst |

3882 | P/B | [100] | 6" | 675 | P/E | 50-150 | SEMI Prime, 1Flat (57.5mm), Empak cst |

6287 | P/B | [100] | 6" | 675 | P/E | 5-10 | SEMI Prime, 1Flat (57.5mm), Empak cst |

5929 | P/B | [100] | 6" | 400 | P/P | 1-30 | SEMI Prime, 1Flat (57.5mm), Empak cst, TTV<5μm |

5686 | P/B | [100] | 6" | 415 ±15 | P/P | 1-30 | SEMI Prime, 1Flat (57.5mm), Empak cst |

5354 | P/B | [100-9.7° towards[001]] ±0.1° | 6" | 525 | P/P | 1-100 | SEMI Prime, 1Flat (57.5mm), Empak cst |

S5838 | P/B | [100] ±1° | 6" | 575 | P/P | 1-20 | SEMI Prime, 1Flat (57.5mm), Empak cst, TTV<2μm |

O698 | P/B | [100] | 6" | 675 | P/P | 1-100 | SEMI Test, Both sides dirty and scratched, 1Flat, Empak cst |

5421 | P/B | [100] | 6" | 675 | P/E | 1-10 {4.5-6.5} | SEMI notch Prime, Empak cst, TTV<7μm |

N698 | P/B | [100] | 6" | 675 | P/E | 1-100 | SEMI Prime, 1Flat, Empak cst |

5733 | P/B | [100] | 6" | 750 ±10 | E/E | 1-5 | SEMI, 1Flat, Soft cst |

6049 | P/B | [100] | 6" | 2,000 | P/P | 1-35 | SEMI Prime, 1Flat (57.5mm), Empak cst |

6096 | P/B | [100] | 6" | 400 ±15 | P/P | 0.5-1.0 | SEMI Prime, 1Flat (57.5mm), Empak cst |

S5834 | P/B | [100] | 6" | 365 ±10 | E/E | 0.01-0.02 | SEMI Prime, 1Flat (57.5mm), TTV<2μm, Empak cst |

F770 | P/B | [100-6° towards[111]] ±0.5° | 6" | 675 | P/P | 0.01-0.02 | SEMI Prime, 1Flat (57.5mm), Empak cst, Both sides with scratches |

E770 | P/B | [100-6° towards[111]] ±0.5° | 6" | 675 | P/E | 0.01-0.02 | SEMI Prime, 1Flat (57.5mm), Empak cst, Both sides polished but only front is Prime |

Y206 | P/B | [100] | 6" | 675 | P/E | 0.01-0.02 | SEMI Prime, 1Flat (57.5mm), Empak cst |

6005 | P/B | [100] | 6" | 320 | P/E | 0.001-0.030 | JEIDA Prime, Empak cst |

D005 | P/B | [100] | 6" | 320 | P/E | 0.001-0.030 | JEIDA Prime, Empak cst |

6237 | P/B | [100] | 6" | 675 | P/P | 0.001-0.005 | SEMI, 1Flat (57.5mm), Empak cst |

9023 | P/B | [111-4.0°] ±0.5° | 6" | 625 | P/E | 4-15 {7.1-8.8} | SEMI Prime, 1 JEIDA Flat(47.5mm), Empak cst |

I324 | n-type Si:P | [100] | 6" | 725 | P/P | 5-35 | SEMI Prime, 1 JEIDA Flat(47.5mm), TTV<2μm, TIR<1μm, Bow<10μm, Warp<20μm, With Laser Mark, Empak cst |

5814 | n-type Si:P | [100] | 6" | 925 ±15 | E/E | 5-35 | JEIDA Prime, Empak cst, TTV<5μm |

5728 | n-type Si:P | [100] | 6" | 675 | P/E | 2.7-4.0 | SEMI Prime, in Empak cassettes of 24 wafers |

B728 | n-type Si:P | [100] | 6" | 675 | P/E | 2.7-4.0 | SEMI Prime, in Empak cassettes of 6 & 7 wafers |

S5837 | n-type Si:P | [100] | 6" | 250 ±5 | P/P | 1-3 | SEMI Prime, 1Flat (57.5mm), TTV<2μm, Empak cst |

S5644 | n-type Si:P | [100-4° towards[110]] ±0.5° | 6" | 675 | P/E | 1-25 | SEMI Prime, 1Flat(57.5mm), Empak cst |

S5913 | n-type Si:P | [100] ±1° | 6" | 800 | P/E | 1-10 | SEMI Prime, 1Flat(57.5mm), Empak cst |

F859 | n-type Si:P | [100-25° towards[110]] ±1° | 6" | 800 | C/C | 1-100 | SEMI notch Prime, Empak cst |

E089 | n-type Si:P | [100] | 6" | 1,910 ±10 | P/P | 1-100 | SEMI Prime, 1Flat (57.5mm), Individual cst, TTV<2μm |

F089 | n-type Si:P | [100] | 6" | 1,910 ±10 | P/P | 1-100 | SEMI Prime, 1Flat (57.5mm), Individual cst, TTV<5μm |

H727 | n-type Si:P | [100] | 6" | 3,000 | P/P | 1-100 | SEMI Prime, 1Flat (57.5mm), Empak cst |

M176 | n-type Si:P | [100] | 6" | 5,000 | P/P | 1-25 | Prime, NO Flats, Individual cst |

5252 | n-type Si:Sb | [100-6° towards[110]] ±0.5° | 6" | 675 | P/P | 0.01-0.02 | SEMI Prime, 1Flat (57.5mm), Empak cst |

C673 | n-type Si:Sb | [100] | 6" | 675 | P/E | 0.008-0.020 | SEMI Prime, 1Flat (57.5mm), Empak cst |

2533 | n-type Si:As | [100] | 6" | 1,000 | L/L | 0.0033-0.0037 | SEMI, 1Flat(57.5mm), in individual wafer cassettes |

E533 | n-type Si:As | [100] | 6" | 1,000 | L/L | 0.0033-0.0037 | SEMI, 1Flat(57.5mm), in individual wafer cassettes |

4204 | n-type Si:As | [100] | 6" | 675 | P/EOx | 0.001-0.005 | SEMI Prime, 1Flat (57.5mm), Empak cst, backside LTO 0.6um, TTV<3μm, Bow/Warp<15μm |

5541 | n-type Si:P | [100] | 6" | 675 | P/EOx | 0.001-0.002 | SEMI Prime, 1Flat (57.5mm), with strippable Epi layer Si:P (0.32-0.46)Ohmcm, 3.20±0.16μm thick, Empak cst |

D339 | n-type Si:P | [111] ±0.5° | 6" | 675 | P/E | 1-100 | SEMI Prime, NO Flats, Empak cst |

1660 | n-type Si:As | [100] | 6" | 675 | OxP/EOx | 0.001-0.005 | SEMI TEST (spots & minor visual defects), 1Flat (57.5mm), Thermal Oxide 0.1μm±5% thick, Empak cst |

H503 | P/B | [100] | 6" | 735 | P/P | FZ >50 | Prime, 1Flat, Empak cst, TTV<2μm |

K343 | n-type Si:P | [112-5° towards[11-1]] ±0.5° | 6" | 800 ±10 | P/P | FZ >3,000 | SEMI, 1 JEIDA Flat (47.5mm), Empak cst, TTV<4μm, Lifetime>1,000μs |

L343 | n-type Si:P | [112-5° towards[11-1]] ±0.5° | 6" | 950 ±10 | P/P | FZ >3,000 | SEMI, 1 JEIDA Flat (47.5mm), Empak cst, TTV<4μm, Lifetime>1,000μs |

H178 | Intrinsic Si:- | [100] | 6" | 675 | P/P | FZ >10,000 | SEMI notch Prime, Empak cst |

G264 | P/B | [100] | 6" | 675 | P/P | 1-5 | SEMI Prime, 1Flat, Soft cst |

Boron Doped Silicon Wafers

We have the Silicon Wafers for industrial temperature sensors applications. Below is what clients have chosen for their research.

150mm P/B (100) >20,000 ohm-cm 300um SSP Prime Grade |
150mmN/Ph (100) 1-5 ohm-cm 500um SSP Prime |
150mmP/B (100) 1-15 ohm-cm 350um SSP Prime Grade |
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Please contact us for pricing.