What does mechanical grade mean for surface roughness on a silicon wafer such as ID number 1093? We are planning on using them as a base for 3d printing a template onto to make PDMS channels.
An undergraduate requested the following quote.
What does mechanical grade mean for surface roughness on a silicon wafer such as ID number 1093? We are planning on using them as a base for 3d printing a template onto to make PDMS channels.
Reference #201836 for specs/pricing.
A doctoral student received thermal oxide coated silicon wafers for the following project:
Ultimately I want to make particles for drug delivery, so I make the Silicon mold, a PDMS inverse mold, then fill in the PDMS mold with polymer that becomes my particle. I needed the oxide layer to do a nested etch -- photoresist pattern 1, BOE to transfer pattern into oxide, strip resist, photoresist pattern 2, etch (PR masking), strip photoresist, etch again (oxide masking), BOE.
Reference #42248 for specs and pricing.
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PDMS stands for Polydimethylsiloxane, a type of silicone elastomer widely used in various industries, including medical, pharmaceutical, and electronics. PDMS is a flexible, transparent, and biocompatible material with excellent thermal and chemical stability, making it an ideal choice for many applications.
PDMS is a popular way to fabricate microfluidic devices because it can accurately replicate microstructures. It is also used as a coating material for medical implants, as it is non-toxic and has low protein adsorption, reducing the risk of infection. PDMS is also used in the electronics industry for insulation, encapsulation, and protection of sensitive components due to its excellent electrical properties and high dielectric strength.
PDMS (Polydimethylsiloxane) is often used with silicon substrates to create microfluidic devices or chips. The combination of PDMS and silicon provides a versatile platform for various applications in microfluidics, such as lab-on-a-chip devices, microreactors, micro-electromechanical systems (MEMS), and biosensors.
Using PDMS with silicon substrates involves a technique called soft lithography. The process requires the fabrication of a master mold by photolithography on a silicon substrate. The master mold has the desired microstructure and is used to create a replica mold using PDMS. The PDMS mold is bonded to a clean silicon substrate, creating a microfluidic channel or device.
The advantage of using PDMS with silicon substrates is that PDMS is a flexible and transparent material that can replicate the microstructure of the master mold accurately. Silicon substrates, on the other hand, provide mechanical stability for various applications due to their excellent electrical properties. The combination of PDMS and silicon allows the fabrication of complex microfluidic devices with high precision and reproducibility.
A mechanical engineering student requested the following quote:
I would like to ask for a quote for the silicon wafer 1474 (100 mm diameter, 500 um thickness, SSP). The wafer is to be used to create a master mold for PDMS soft lithography. Thank you in advance!
Reference #223414 for specs and pricing.
Soft lithography is a technique used in microfabrication that involves using elastomeric stamps or molds to create patterns on a substrate. The principles of lithography involve using a mask to transfer a pattern onto a substrate selectively. However, in soft lithography, the mask is replaced with an elastomeric stamp or mold that can conform to the shape of the substrate.
A postdoc rquested the following quote:
I want to purchase some wafers, but I wanted to see what wafers would be the best price while still being useful for the application I need.
Particularly:
Reference #233716 for specs and pricing.
A Phd candiate needed a quote for the following:
I am looking for diced 1cm by 1cm silicon substrates etched with microchannels. I am not sure what you have that would meet this specification. I am looking to do soft lithography to make a PDMS stamp that contains microchannels with cross sectional dimensions of ~5um by 10um but would potentially require various dimensions as well.
I will need some various microchannels that are ~800um^2 area on 1cm^2 diced Si substrates.
This would make a total of 22 substrates. Is is possible to get these resolutions? As is outlined above, all of my Si channels will be 5um wide, but the spacings vary so that my PDMS mold will will contain various channel widths (10um to 1um). The depths also vary between 10um and 1um.
Let me know if you have these capabilities and pricing as soon as possible as I would like these within the next coupe of weeks if possible. If you have any dimensions already fabricated, I would also potentially be interested in those as well.
We quoted:
Microchannel based on Si wafers
Patterning Process
Dicing 10mm*10mm
3um , 5um , 10um spacing * wide 5um
Depth (3um , 5um , 10um) may vary slightly becase in one wafers drawed 3um & 5um % 10um
Reference #243280 for specs and pricing.