I am a customer of UniversityWafer and saw that you provide wafer bonding services. What types of wafer bonding are available, and do you provide adhesive wafer bonding?
Silicon Wafer Bonding Services
Silicon wafer bonding is used to join silicon to silicon, glass, dielectric-coated wafers, carrier substrates, and other compatible materials for MEMS, SOI fabrication, sensors, microfluidics, semiconductor processing, photonics, and advanced packaging.
UniversityWafer can support permanent and temporary bonding applications. The appropriate process depends on the materials being joined, surface condition, required bond strength, temperature budget, electrical or optical requirements, and whether the wafers must later be separated.
Example Wafer Bonding Request
A PhD candidate asked:
Types of Wafer Bonding
Several different bonding approaches are used in semiconductor research and manufacturing. They should be distinguished because their materials, process temperatures, reversibility, and applications can differ substantially.
Direct Silicon Wafer Bonding
Direct wafer bonding, sometimes called silicon fusion bonding when applied to silicon-based surfaces and subsequently strengthened by annealing, joins highly smooth and clean wafers without a separate adhesive layer.
Hydrophilic direct bonding commonly uses silicon surfaces terminated with hydroxyl groups, often on native or intentionally grown SiO2. When the surfaces are brought into intimate contact, intermolecular interactions initiate the bond. Thermal treatment can then strengthen the interface through condensation and structural reorganization.
Hydrophobic silicon surfaces can also be directly bonded after suitable surface preparation. Therefore, oxidation and moisture are not simply contaminants that must always be excluded; the desired surface chemistry depends on the selected bonding process.
Adhesive Wafer Bonding
Adhesive bonding uses an intermediate polymer or bonding material between the wafers. Depending on the application, materials may include epoxies, BCB, thermoplastics, photoresists, waxes, or specialized temporary-bonding polymers.
Adhesive bonding can provide advantages when the process requires a lower thermal budget, greater tolerance to surface topography, electrical isolation, planarization, or temporary mechanical support.
Maximum usable temperature is determined by the specific adhesive system, cure conditions, atmosphere, process time, and downstream chemicals. It should not be assigned a universal value such as 100°C or 200°C for all epoxies or waxes.
Temporary Carrier Wafer Bonding
Temporary bonding attaches a device wafer to a mechanically stronger carrier wafer so the device wafer can safely undergo thinning, backside processing, lithography, deposition, etching, or other fabrication steps.
After processing, the bonded pair is intentionally separated using a thermal, mechanical, chemical, or laser-assisted debonding method appropriate for the bonding system.
Anodic Silicon-to-Glass Bonding
Anodic bonding is widely used to permanently join silicon to alkali-containing glass, particularly borosilicate glass used in MEMS and microfluidic devices.
The process applies elevated temperature and a high electric field across the silicon-glass stack. Mobile alkali ions in the glass migrate away from the interface, creating a depletion region and strong electrostatic attraction that promotes formation of a permanent bond.
Anodic bonding is commonly used for MEMS cavities, pressure sensors, microfluidic devices, accelerometers, and wafer-level packaging.
Silicon Wafer Bonding for SOI Fabrication
Wafer bonding is an important technique for creating silicon-on-insulator (SOI) wafers . A typical bonded SOI structure consists of:
- A crystalline silicon device layer
- A buried silicon dioxide (BOX) layer
- A silicon handle wafer
In one traditional bonded-wafer approach, an oxide layer is formed on one or both silicon wafers, the surfaces are prepared and directly bonded, and one silicon wafer is subsequently thinned to form the device layer.
Device-layer thinning can involve grinding, polishing, etch-back, or layer-transfer techniques depending on the desired structure. Modern SOI manufacturing may also use ion-implantation and layer-transfer processes rather than relying exclusively on mechanical grinding.
Bonded SOI technology is important for MEMS , CMOS, RF devices, photonics, sensors, and other semiconductor technologies requiring a thin crystalline silicon layer electrically isolated from the handle substrate.
Bonding Silicon to Glass for Microdevices
A postdoctoral researcher asked about designing a silicon-based device for producing uniformly sized polymer microparticles and planned to anodically bond the silicon device wafer to glass.
Research Questions:
- What silicon wafer thickness is appropriate for the device?
- Can Borofloat 33 glass be anodically bonded to silicon?
- Is thermal oxidation of the silicon required before anodic bonding?
- What bonding process is appropriate for the intended device?
There is no universal silicon thickness that is ideal for every bonded microdevice. A thickness near 500 µm may be suitable for some wafer sizes and processes, but the correct value depends on wafer diameter, mechanical stiffness, etch depth, device geometry, chuck compatibility, handling requirements, and final package design.
Is Thermal Oxide Required for Anodic Bonding?
A thermal oxide layer is not universally required for conventional silicon-to-borosilicate anodic bonding. Direct silicon-to-glass anodic bonding is widely practiced.
An oxide or other dielectric layer can alter current flow, electric-field distribution, and interfacial chemistry. Whether an oxide-coated silicon wafer can be anodically bonded successfully therefore depends on oxide thickness, glass composition, applied voltage, temperature, equipment, and device requirements.
If electrical isolation or a defined SiO2 layer is required in the completed device, the oxide should be considered as part of the entire process design rather than added automatically for the bonding step.
Reference #265416 for original request specifications and pricing.
What Determines Silicon Wafer Bond Quality?
High-quality bonding requires more than simply pressing two wafers together. Important parameters can include:
- Surface roughness
- Particle contamination
- Surface chemistry
- Wafer flatness, bow and warp
- Bonding temperature
- Applied pressure or force
- Thermal expansion mismatch
- Alignment requirements
- Bonding atmosphere or vacuum
- Required interface strength
Direct bonding is especially sensitive to particles because even a small contaminant can prevent intimate surface contact over an area much larger than the particle itself.
Extremely smooth, planar surfaces can be prepared using processes such as chemical mechanical polishing (CMP) .
How Are Bonded Silicon Wafers Inspected?
Bonded wafer interfaces can be evaluated using several techniques depending on the materials and required sensitivity.
- Infrared imaging: useful for many silicon-based wafer pairs because silicon is transparent over suitable infrared wavelength ranges.
- Scanning acoustic microscopy: can detect voids, delamination, and other interface defects.
- Optical or X-ray inspection: may be appropriate for selected substrate combinations and structures.
- Mechanical bond testing: can evaluate fracture behavior or bond strength.
- Crack-opening methods: can be used in research to estimate interfacial bond energy for suitable wafer systems.
Bond verification should therefore not be described as requiring buffered HF immersion or destructive separation in every case.
Silicon Dioxide and Wafer Bonding
Silicon dioxide (SiO2) plays an important role in semiconductor processing and in many hydrophilic direct-bonding processes.
The Si–O bonds in silicon dioxide are best described as strong polar covalent bonds with significant ionic character. Oxygen is substantially more electronegative than silicon, producing an uneven distribution of electron density within the bond.
Structure of SiO2
Silicon atoms in SiO2 are coordinated approximately tetrahedrally by oxygen. Each oxygen bridges neighboring silicon-centered tetrahedra, creating an extended three-dimensional network.
- Crystalline quartz: SiO4 tetrahedra are arranged in a long-range ordered crystal structure.
- Amorphous SiO2: such as high-quality thermal oxide on silicon, retains short-range tetrahedral bonding but lacks long-range crystalline order.
Why SiO2 Matters in Direct Bonding
Hydrophilic oxide surfaces can be terminated with hydroxyl (–OH) groups. When two properly prepared surfaces are contacted, hydrogen bonding and other intermolecular interactions initially hold the surfaces together.
During subsequent thermal treatment, condensation reactions can create stronger interfacial Si–O–Si linkages while water-related species redistribute or leave the interface. The exact interface evolution depends on surface preparation and annealing conditions.
This chemistry helps explain why oxidized silicon surfaces are widely used in hydrophilic direct wafer bonding and bonded SOI fabrication.
What Information Is Needed for a Wafer Bonding Quote?
To identify an appropriate bonding process, provide as many of the following specifications as possible:
- Material of each wafer
- Wafer diameter
- Wafer thickness
- Surface finish
- Existing oxide, nitride, metal, or polymer layers
- Desired permanent or temporary bond
- Maximum allowable process temperature
- Vacuum or chemical exposure requirements
- Required alignment accuracy
- Required bond strength or hermeticity
- Downstream processing steps
- Quantity
These specifications are more useful than requesting simply "silicon bonding," because the appropriate technique depends on the complete material stack and fabrication process.
Request Silicon Wafer Bonding Services
UniversityWafer can support silicon wafer and substrate requirements for direct bonding, fusion bonding, anodic bonding, adhesive bonding, temporary carrier bonding, SOI research, MEMS, sensors, microfluidics, and semiconductor process development.
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How Are Silicon Wafers Bonded?
Silicon wafer bonding joins two prepared substrates to create a mechanically integrated wafer stack. Depending on the process, the bond may be formed directly between prepared surfaces or through an intermediate layer such as glass, metal, polymer, or adhesive.
Wafer bonding is widely used in MEMS, silicon-on-insulator (SOI), sensors, microfluidics, photonics, semiconductor packaging, wafer thinning, 3D integration, and research device fabrication.
The appropriate bonding method depends on the substrate materials, surface condition, allowable process temperature, required bond strength, topography, electrical requirements, alignment tolerance, hermeticity, and whether the bond must be permanent or temporary.
Common Silicon Wafer Bonding Methods
There is no single bonding technique that is best for every semiconductor process. Common approaches include:
- Direct or fusion bonding – highly smooth and clean surfaces are brought into intimate contact without a separate adhesive layer.
- Anodic bonding – commonly joins silicon to suitable alkali-containing glass using elevated temperature and an electric field.
- Adhesive bonding – uses a polymer or other intermediate adhesive layer and can provide a relatively low-temperature process.
- Temporary carrier bonding – supports thin or fragile device wafers during grinding, polishing, lithography, etching, deposition, or backside processing.
- Eutectic and metal bonding – uses metallic interfaces for applications requiring properties such as hermetic sealing, electrical conduction, or robust packaging.
Direct Silicon Wafer Bonding
Direct wafer bonding joins sufficiently smooth, flat, clean surfaces without introducing a conventional adhesive layer. Silicon-to-silicon and silicon-dioxide-containing surfaces are important examples.
At room temperature, the initial bond can involve intermolecular forces whose nature depends on the surface termination. Subsequent annealing can strengthen the interface through chemical reactions and formation of stronger interfacial bonds.
Direct bonding is particularly sensitive to particles, organic contamination, surface roughness, bow, warp, and local topography because the surfaces must approach each other closely across the bonding area.
Hydrophilic Direct Bonding
Hydrophilic bonding commonly uses silicon surfaces containing native, thermal, or chemically formed SiO2. After suitable cleaning and activation, the surfaces can contain hydroxyl (–OH) groups and adsorbed water.
When the wafers are contacted, hydrogen bonding and other intermolecular interactions can initiate adhesion. During annealing, condensation reactions and interfacial restructuring can strengthen the bond and form additional Si–O–Si connections.
Hydrophobic Direct Bonding
Silicon surfaces can also be prepared in a hydrophobic state, for example with hydrogen-terminated surfaces after appropriate processing. Hydrophobic bonding follows different interfacial chemistry from oxide-mediated hydrophilic bonding and may require different thermal treatment to develop high bond strength.
The appropriate surface preparation should therefore be selected for the intended wafer stack rather than assuming that all direct silicon bonding uses the same surface chemistry.
Is Fusion Bonding Different from Direct Bonding?
The terms silicon fusion bonding and direct silicon bonding are often used for closely related processes rather than as completely separate bonding technologies.
In a typical direct-bonding process, prepared silicon or oxide-containing surfaces are contacted without an intermediate adhesive. A subsequent thermal anneal can substantially increase interface strength, producing the strong permanent interface often described as a fusion bond.
Required annealing conditions depend on the surface preparation, materials, contamination limits, device structure, and thermal budget. High-temperature annealing can produce strong interfaces, while surface-activation techniques can enable useful bonding at lower temperatures for temperature-sensitive structures.
Surface Preparation Before Wafer Bonding
Surface preparation is one of the most important factors in successful direct wafer bonding. A typical process may include some combination of:
- Wafer inspection and dimensional verification
- Removal of particles and organic contamination
- Surface cleaning appropriate for the materials
- Oxide growth or oxide removal when required
- Surface activation or plasma treatment when specified
- Rinsing and controlled drying
- Wafer alignment
- Initial contact and bond-wave propagation
- Thermal treatment or curing when required
- Bond-interface inspection
Chemical mechanical polishing (CMP) may be used when exceptionally smooth and planar surfaces are required.
Why Particles Cause Wafer Bonding Voids
Direct bonding requires intimate contact between the two surfaces. A particle trapped at the interface can locally separate the wafers and create an unbonded region or bonding void substantially larger than the contaminating particle itself.
This is one reason wafer cleaning, cleanroom handling, surface inspection, and particle control are critical for high-yield direct bonding.
Anodic Bonding of Silicon to Glass
Anodic bonding is widely used to join silicon with suitable alkali-containing glasses, including certain borosilicate glasses.
During bonding, the wafer stack is heated and a high electric potential is applied. Mobile alkali ions in the glass migrate under the electric field, leaving a depletion region near the silicon-glass interface. The resulting electrostatic attraction brings the surfaces into close contact and facilitates formation of a strong permanent interface.
Anodic bonding is important for MEMS packaging, pressure sensors, accelerometers, microfluidic structures, sealed cavities, and other silicon-glass devices.
Choosing Glass for Anodic Bonding
Not every glass composition behaves identically during anodic bonding. Important parameters include alkali-ion content, thermal expansion coefficient, electrical behavior at bonding temperature, surface finish, thickness, and allowable process temperature.
Matching thermal expansion behavior is especially important because a large mismatch can generate residual stress as the bonded wafer pair cools.
Glass wafers and Borofloat 33 substrates are available for research requiring glass-based wafer processing.
Adhesive Wafer Bonding
Adhesive wafer bonding introduces an intermediate material between the two substrates. Depending on the process, the adhesive can be a thermosetting polymer, thermoplastic, epoxy, BCB, photo-patternable polymer, wax, or another engineered bonding material.
Compared with direct bonding, adhesive layers can tolerate greater surface roughness and topography and can often be processed at lower temperatures. This makes adhesive bonding useful for temperature-sensitive devices and heterogeneous material stacks.
Permanent vs. Temporary Adhesive Bonding
Permanent adhesive bonding is used when the polymer layer is intended to remain in the finished device or package. Important properties can include adhesion strength, thermal stability, chemical resistance, dielectric properties, outgassing, optical characteristics, and moisture resistance.
Temporary bonding has a different objective. The adhesive holds a device wafer to a carrier wafer during processing and is intentionally removed afterward.
Temporary bonding is especially useful for wafer backgrinding and thinning, backside processing, thin-wafer handling, and selected advanced-packaging processes.
Eutectic and Metal Wafer Bonding
Eutectic bonding uses a material combination that forms a liquid phase at a characteristic composition and temperature lower than the melting temperature of the individual constituents. Upon cooling, the interface solidifies to create a bonded structure.
Metal-based bonding processes can be attractive for hermetic MEMS packaging, electrical interconnects, thermal conduction, and wafer-level packaging.
The appropriate metal system depends on allowable process temperature, semiconductor compatibility, intermetallic formation, contamination requirements, mechanical stress, electrical properties, and long-term reliability.
Role of Thermal Annealing in Direct Bonding
Thermal annealing is often used after initial direct wafer contact to increase interfacial bond strength. It should not be confused with conventional bulk-material annealing performed primarily to change hardness or ductility.
In hydrophilic silicon or SiO2 bonding, heating promotes interfacial chemical reactions and structural rearrangement. As the interface evolves, stronger covalent bonding can develop.
Bonding temperature must be selected with the entire device stack in mind. Metal layers, dopant profiles, polymers, completed devices, thermal expansion mismatch, and temperature-sensitive structures can limit the allowable thermal budget.
Low-Temperature Silicon Wafer Bonding
Some semiconductor structures cannot tolerate the temperatures associated with conventional high-temperature direct bonding. In these cases, surface-activated, plasma-assisted, adhesive, metal, or other low-temperature bonding processes may be considered.
Plasma activation, for example, can modify surface chemistry and increase surface reactivity so that useful bond strength can be achieved with a lower subsequent annealing temperature.
Low-temperature processing can be particularly important for completed CMOS structures, heterogeneous material integration, MEMS, photonic devices, and substrates with significantly different coefficients of thermal expansion.
Wafer Bonding for MEMS
MEMS fabrication is one of the major application areas for wafer bonding. Bonding can create sealed cavities, cap wafers, reference-pressure chambers, microfluidic channels, mechanical structures, and wafer-level packages.
Depending on the device architecture, MEMS processes may use silicon direct bonding, silicon-to-glass anodic bonding, glass frit bonding, adhesive bonding, or metal/eutectic bonding.
For devices requiring sealed cavities, the process may also need to meet specified hermeticity and cavity-atmosphere requirements.
Wafer Bonding for Silicon-on-Insulator
Silicon-on-insulator (SOI) is an important application of direct wafer bonding and layer-transfer technology.
A bonded SOI structure typically contains a crystalline silicon device layer separated from a silicon handle wafer by a buried oxide (BOX) layer. Depending on the manufacturing process, the device layer can be produced by controlled thinning or by transferring a defined layer from a donor wafer.
SOI substrates are widely used for MEMS, RF electronics, CMOS, silicon photonics, sensors, and other applications requiring electrical isolation or controlled device-layer thickness.
Wafer Bonding for Silicon Photonics
Wafer and die bonding can also enable heterogeneous photonic integration. For example, III-V semiconductor materials can be bonded to silicon-based photonic platforms when direct epitaxial growth would introduce excessive crystalline defects or other integration challenges.
Bonding approaches can therefore help combine the mature processing and passive optical capabilities of silicon with active optical functions provided by other semiconductor materials.
How Is Wafer Bond Quality Evaluated?
Bond inspection should be selected according to the substrate materials, interface structure, and application. Common methods include:
- Infrared transmission imaging for detecting interface voids in suitable silicon wafer stacks.
- Scanning acoustic microscopy for locating delamination, voids, and interface defects.
- Optical inspection when the substrate combination permits direct observation.
- Mechanical testing for evaluating fracture behavior or interface strength.
- Bond-energy measurements for quantitative research and process characterization.
- Leak testing when hermetic wafer-level packaging is required.
Destructive chemical exposure is therefore not a universal or preferred method for determining whether two wafers have bonded successfully.
Comparing Silicon Wafer Bonding Methods
| Bonding Method | Typical Materials | Key Advantages | Common Applications |
|---|---|---|---|
| Direct / Fusion | Si-Si, SiO2-SiO2, compatible polished surfaces | No conventional adhesive layer; strong interface possible | SOI, MEMS, sensors, photonics |
| Anodic | Silicon + suitable alkali-containing glass | Strong permanent silicon-glass bond | MEMS, microfluidics, sensors, sealed cavities |
| Adhesive | Silicon, glass and heterogeneous substrates | Lower-temperature options; tolerates more topography | MEMS, packaging, heterogeneous integration |
| Temporary Carrier | Device wafer + carrier wafer | Mechanical support with intentional debonding | Thinning, backside processing, thin-wafer handling |
| Eutectic / Metal | Metal-coated semiconductor or compatible wafer stacks | Potential hermeticity, electrical and thermal conduction | MEMS packaging, interconnects, wafer-level packaging |
How to Choose a Silicon Wafer Bonding Process
Before selecting a bonding method, consider the complete device and process flow rather than bond strength alone.
Important questions include:
- What two materials must be bonded?
- Is the bond permanent or temporary?
- What is the maximum allowable process temperature?
- Are either of the surfaces patterned or highly topographic?
- Is electrical insulation or conduction required across the interface?
- Must the interface be optically transparent?
- Is a hermetic cavity required?
- What alignment accuracy is necessary?
- Will the wafer undergo grinding or thinning after bonding?
- What chemicals and temperatures will the bonded stack encounter?
Providing these specifications helps determine whether direct, anodic, adhesive, temporary, eutectic, or another bonding process is appropriate for the application.
Silicon Wafers and Substrates for Bonding Research
UniversityWafer supplies silicon wafers , oxidized silicon, glass wafers , carrier substrates, SOI wafers, and other materials for wafer bonding, MEMS, microfabrication, photonics, and semiconductor research.
When requesting material or bonding services, provide the substrate materials, diameter, thickness, surface finish, existing films, temperature limit, desired bonding method, downstream processing, and quantity.
Related Silicon Wafer Bonding Resources
- Wafer Bonding Methods & Services – Learn about direct, anodic, adhesive and temporary bonding for semiconductor substrates.
- Anodic Wafer Bonding – Silicon-to-glass bonding for MEMS, sensors, microfluidics and wafer-level packaging.
- Silicon-on-Insulator (SOI) Wafers – Explore SOI substrates with crystalline silicon device layers and buried oxide.
- Silicon Wafers for MEMS – Substrates for MEMS sensors, actuators, cavities and micromachined devices.
- Carrier Wafers – Mechanical support substrates for temporary bonding, thinning and backside processing.
- Chemical Mechanical Polishing (CMP) – Surface planarization and polishing for semiconductor processing and wafer bonding.
- Glass Wafers – Glass substrates for anodic bonding, MEMS, microfluidics and optical devices.
- Thermal Oxide Silicon Wafers – SiO2-coated silicon substrates for dielectric, SOI and bonding research.
- Silicon Wafers – Research and semiconductor-grade silicon substrates in multiple diameters, orientations, thicknesses and surface finishes.