Germanium-on-Insulator (GOI) for Research & Development
Germanium on Insulator (GeOI)
GeOI combines shares similiar advantages to Silicon-on-Insulator (SOI) wafers. Researchers are studying GeOI as a silicon replacement for future IC technology.
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What are Germanium On Insulator (GOI)?
The Germanium On Insulator (GeOI) combines the SOI structure with the high mobility of charge carriers to provide a highly integrated platform for future IC technology. In addition to semiconductor functions, GeOIs can be used for optoelectronics. In this article, we will discuss the process involved in creating GeOIs. Ultimately, we will see what advantages and disadvantages these materials have in IC applications.
What Are Some Germanium on Insulator Research?
On July 6, 2009, a team of researchers from MIT designed a silicon-based photodetector (Si-PD) for use in integrated circuits. In this application, the detector receives optical pulses and demonstrates the use of a molybdenum diieluride-based light emitter. Germanium is CMOS-compatible and can be grown epitaxially on silicon. The team from the University of Illinois at Urbana-Champaign created a photo-detector that is sensitive to ultraviolet light by depositing a thin film of silicon nanoparticles on the silicon substrate. On July 6, 2009, a world leader in high-performance, low-cost semiconductor substrates announced the first commercial application of a technical substrate for detecting ultraviolet (UV) light. [Sources: 0, 11]
The study was conducted by a photodetector based on a molybdenum dieluride-based light emitter from the University of Illinois at Urbana-Champaign (UIC) and the US National Institute of Standards and Technology (NIST). [Sources: 0]
Furthermore, the invention relates to the production of a germanium-on-insulator wafer (GeOI) using the methods described above. Soitec used its own smart cut process to transfer the germanium layer from the wafers to a single semiconductor dispenser formed by dilution steps. The fluctuations consist of a combination of two layers of silicon and a layer of molybdenum diieluride with a thickness of about 1.5 mm. [Sources: 4, 5, 12]
This is particularly important because the germanium layer 112, which was originally grown on a second semiconductor substrate (110), is quite thin and silicon and g-germanium (SiGe) are removed and not formed during the growth process. The thickness of the epitaxy of Germanium silicon varies depending on the application intended for the production of the GOI substrate. If desired, it can be produced with silicon-ribbed Si geGe and a molybdenum-diieluride layer. [Sources: 1, 8]
IMEC, Soitec and Umicore have joined forces to support the germanium program to enable the production of the germanium on insulator substrates on a second semiconductor substrate. Accordingly, an improved g-germanium-on-insulator substrate is required, and this is now guaranteed by the present invention. [Sources: 5, 13]
Germanium - on - insulator - tensile - strain and defect during annealing in the oxygen environment and in the production of g - germanium on insulators. [Sources: 2]
Germanium - on - insulator (GOI) substrate, the final substrate (120) is described as a "complete step 106" and is initially presented as g - germanium on insulation (G - GONI). [Sources: 8, 10]
A variety of different germanium-on-insulator wafers can be obtained by the same method by building a g germanium oxynitride layer on the Germanium layer, which comprises both the silicon and the G-GONI substrate from the starting substrate. The transfer of silicon to g-nucleus layers has a number of advantages, such as high thermal conductivity and low costs. SGOI is usually obtained by intelligent cutting technology, for example by using high-speed laser cutting or a combination of laser cutter and electron microscope. [Sources: 4, 12]
In view of this, the semiconductor insulator substrate may consist of, for example, gGermanium Oxide, Silicon Oxide or a combination of both. One possible solution is a germanium-on-insulator (GOI) substrate, which is formed from the same application as above. [Sources: 4, 8]
A1 discloses a method for producing a Germanium-on-Insulator wafer with a geO (n, y) layer on a silicon oxide (SiO2). The GeO (n, Y) layers form a buried dielectric and have an additional layer of Si O 2, which lies between the g-germanium oxynitride layer and the handle of the substrate. The germanium insulators on the wafers consist of two layers of silicon oxide and one layer of gGODO, a combination of both. [Sources: 12, 13]
C demonstrates the Germanium - fabricated insulator wafer, a g germanium oxynitride layer (7) that provides a dielectric with a surface area of 1,000 nm and a thermal conductivity of 0.5 nm. [Sources: 12]
The Ge photodetector is integrated into the amorphous Si waveguide by gluing the Ge insulator substrate to the SOI wafer. Now turn to Substrate 10, as shown in Figure 1, which is known in the technique as germanium on insulator (GOI) substrate (10). Figure 1 shows a schematic cross-section of the surface of the gGermanium Oxynitride layer on the silicon insulators (SO I) wafers. [Sources: 2, 3, 6]
The basic speed advantage of Germanium over silicon has been known for decades, and indeed germanium bipolar transistors have been common since the early days of semiconductor technology. The same trend is evident in devices grown in g germanium: more silicon devices are being manufactured with a silicon insulator to prevent power leaks. Ge plays an important role in its pseudo-silicon counterparts such as silicon photodetectors. [Sources: 5, 9, 12]
The current process allows low-cost Germanium to be delivered on insulator wafers that are also of superior quality. In summary, we have optimized and developed a new process for the production of g-germanium - on - silicon transistors and photodetectors from g-germanium. [Sources: 7, 12]
Sources:
[0]: https://milivingradio.com/4mdphq/silicon-photodetector.html
[1]: https://patents.patsnap.com/v/US10163684-fabrication-of-silicon-germanium-on-insulator-finfet.html
[2]: https://www.osapublishing.org/abstract.cfm?uri=oe-28-16-23739
[3]: https://www.google.com/patents/US20070042572
[4]: https://patents.justia.com/patent/10510583
[6]: https://www.google.com.gi/patents/WO2007024469A2
[7]: https://ecs.confex.com/ecs/226/webprogram/Paper41717.html
[8]: http://www.freepatentsonline.com/y2017/0271201.html
[9]: https://www.frontiersin.org/articles/10.3389/fphy.2019.00134/full
[10]: http://kth.diva-portal.org/smash/record.jsf?pid=diva2:1245065
[12]: https://patents.google.com/patent/US7229898B2/en
[13]: https://www.google.je/patents/US20100052104